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Deep Learning Automates Parameter Extraction For 2D Transistors (Stanford, SLAC)

Semiconductor Engineering
Deep Learning Automates Parameter Extraction For 2D Transistors (Stanford, SLAC)
Researchers from Stanford University and SLAC National Accelerator Laboratory published a technical paper titled “Deep Learning to Automate Parameter Extraction and Model Fitting of Two-Dimensional Transistors.” Abstract Excerpt: “We present a deep learning approach to extract physical parameters (e.g., mobility, Schottky contact barrier height, and defect profiles) of two-dimensional (2D) transistors from electrical measurements, enabling... » read more

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